In recent years, an organic Electro Luminescence (EL) display device has attracted attention as a display device having features such as a thin type, high display quality, and low power consumption, and development thereof has been vigorously advanced. In a display portion of the organic EL display device, arranged in a matrix are pixel circuits including organic EL elements (also referred to as “Organic Light Emitting Diodes”) that are self-luminosity type display elements driven by current and drive transistors. As for various display devices including the organic EL display device, as one driving method, a driving method in which data signals generated by a data line driver are demultiplexed and supplied to the predetermined number, that is two or more, of data lines (hereinafter, referred to as a “Source Shared Driving (SSD) method” or a “Demultiplexer method”), is known. Accordingly, in the following description, an organic EL display device as a display device adopting the SSD method is described as an example.
FIG. 22 is a circuit diagram illustrating a connection relationship between pixel circuits and various wiring lines in an organic EL display device adopting the SSD method disclosed in PTL 1. The organic EL display device adopting the SSD method (hereinafter, referred to as an “example in the related art”) performs color display of RGB three-primary colors. m×k×n pixel circuits corresponding to intersections between m×k data lines (each of m and k is an integer equal to or more than 2) and n scanning lines (n is an integer equal to or more than 2) are provided. Note that the pixel circuits illustrated in FIG. 22 include a pixel circuit 11r corresponding to R (red), pixel circuit 11g corresponding to G (green), and a pixel circuit 11b corresponding to B (blue).
Respective m output lines di (i=1 to m) connected to an output terminal of a data driver not illustrated correspond to m demultiplexers 41i. Each output line di corresponding to each demultiplexer 41i is connected to three data lines Dri, Dgi, and Dbi via three selecting transistors Mr, Mg, and Mb, respectively, included in the demultiplexer 41i. The selecting transistors Mr, Mg, and Mb all are P-channel type transistors. The selecting transistor Mr turns to an on state in response to a data selection signal ASr when a data signal corresponding to R (hereinafter, referred to as a “R data signal”) is to be supplied to the data line Dri. The selecting transistor Mg turns to an on state in response to a data selection signal ASg when a data signal corresponding to G (hereinafter, referred to as a “G data signal”) is to be supplied to the data line Dgi. The selecting transistor Mb turns to an on state in response to a data selection signal ASb when a data signal corresponding to B (hereinafter, referred to as a “B data signal”) is to be supplied to the data line Dbi. As a result, if the R data signal, the G data signal, and the B data signal are time-divisionally supplied to the output line di, the R data signal, the G data signal, and the B data signal are supplied by the demultiplexer 41i to the data line Dri, data line Dgi, and the data line Dbi, respectively. Adopting the SSD method like this can reduce a circuitry scale of the data driver.
In the example in the related art (the organic EL display device disclosed in PTL 1), as illustrated in FIG. 22, data capacitors Cdri, Cdgi, and Cdbi for holding a voltage of the data signal (hereinafter, also referred to as a “data voltage”) are connected to the data line Dri, the data line Dgi, and the data line Dbi, respectively. Each pixel circuit includes one organic EL element OLED, six transistors M1 to M6, and two capacitors C1 and C2. The transistors M1 to M6 all are P-channel type transistors. The transistor M1 is a drive transistor for controlling a current to be supplied to the organic EL element OLED. The transistor M2 is a write transistor for writing a voltage of a data signal (data voltage) into the pixel circuit. The transistor M3 is a compensation transistor for compensating variation in a threshold voltage of the driving transistor M1 which causes a luminance unevenness. The transistor M4 is an initialization transistor for initializing a gate voltage Vg of the driving transistor M1. The transistor M5 is a current supply transistor for controlling supply of a H level voltage ELVDD to the pixel circuit. The transistor M6 is a light emission control transistor for controlling a light emission period of the organic EL element OLED. The capacitors C1 and C2 are capacitors for holding a source-gate voltage Vgs of the driving transistor M1. Any of gate terminals of the write transistors M2 in the pixel circuits 11r, 11g, and 11b is connected to a scanning line Sj (j=1 to n).
FIG. 23 is a timing chart illustrating a driving method of a pixel circuit illustrated in FIG. 22. From a time point t1 to a time point t2, the initialization transistor M4 is in the on state so that the gate voltage Vg of the driving transistor M1 is initialized. From the time point t2 to a time point t3, a data signal is supplied to the data line Dri and a voltage of the data signal is held in the data capacitor Cdri. From the time point t3 to a time point t4, a data signal is supplied to the data line Dgi and a voltage of the data signal is held in the data capacitor Cdgi. From a time point t4 to the time point t5, a data signal is supplied to the data line Dbi and a voltage of the data signal is held in the data capacitor Cdbi. At a time point t5, the write transistor M2 and the compensation transistor M3 in each pixel circuit turns to the on state so that the data voltage is given to the gate terminal of the driving transistor M1 via the write transistor M2, the driving transistor M1, and the compensation transistor M3. At this time, the driving transistor M1 turns to a diode-connected state, and the gate voltage Vg of the driving transistor M1 is obtained by Equation (1) below.Vg=Vdata−|Vth|  (1)
where, Vdata represents the data voltage, Vth represents the threshold voltage of the driving transistor M1, Vth<0 holds for the P-channel type transistor, and Vth>0 holds for an N-channel type transistor. Note that the driving transistor M1 in an example in the related art illustrated in FIG. 21 is a P-channel type transistor.
At a time point t6, the write transistor M2 and the compensation transistor M3 turns to an off state, and the current supply transistor M5 and the light emission control transistor M6 turns to the on state. For this reason, a drive current I expressed by Equation (2) below is supplied to the organic EL element OLED so that the organic EL element OLED emits light according to a current value of the drive current I.I=(β/2)·(Vgs−Vth)2  (2)
where, β represents a constant, and Vgs represents a source-gate voltage of the driving transistor M1. The source-gate voltage Vgs of the driving transistor M1 is obtained by Equation (3) below.
                    Vgs        =                                            (                              Vdata                -                                                    Vth                                                              )                        -            ELVDD                    =                      Vdata            +            Vth            -            ELVDD                                              (        3        )            
Equation (4) below is derived from Equation (2) and Equation (3).I=β/2·(Vdata−ELVDD)2  (4)
In Equation (4), a term of the threshold voltage Vth is absent. For this reason, the variation in the threshold voltage Vth of the driving transistor M1 is compensated. In this way, in example in the related art, the variation in the threshold voltage of the driving transistor M1 is compensated by a configuration in the pixel circuit. Note that it has been known that the longer a period is set during which the threshold voltage Vth is compensated by putting the driving transistor M1 into the diode-connected state, that is, a scanning line select period SCN during which a scanning signal is in a low level, the more the variation in the threshold voltage Vth of the driving transistor M1 is suppressed.